Browse Prior Art Database

Microelectronic Packaging Technique

IP.com Disclosure Number: IPCOM000091622D
Original Publication Date: 1968-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 23K

Publishing Venue

IBM

Related People

Cherniak, GB: AUTHOR [+2]

Abstract

This packaging technique permits the combination of a plurality of microminiature modules into a single integrated component using stacking methods. Upper level substrate 11 is pinned in such a manner that a two-sided pinhead exists as at 12 and 13. Pinhead 12 can be made flush on the uppermost substrate. Different substrates having different electrical properties can be used at each level. After the modules are processed up to and including chip joining, the module pins are fluxed and module 11 is stacked on module 14, pinhead to pinhead, as shown at 13 and 15. A stacking fixture holds them in alignment. The stacked modules are then sent through the normal chip joining solder reflow cycle.

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Microelectronic Packaging Technique

This packaging technique permits the combination of a plurality of microminiature modules into a single integrated component using stacking methods. Upper level substrate 11 is pinned in such a manner that a two-sided pinhead exists as at 12 and 13. Pinhead 12 can be made flush on the uppermost substrate. Different substrates having different electrical properties can be used at each level. After the modules are processed up to and including chip joining, the module pins are fluxed and module 11 is stacked on module 14, pinhead to pinhead, as shown at 13 and 15. A stacking fixture holds them in alignment. The stacked modules are then sent through the normal chip joining solder reflow cycle.

The advantages of this method are that high head to head contact yields are achieved without any necessary solder preforms or paste in the area of joining. This is possible since the pinheads are very nearly coplanar by the very nature of the pinheading process. No extra reflow process is needed since the pinhead joining is accomplished during the normal chip joining procedure. Greater density can be achieved. The gap between layers is very small so that a multilayer module can be obtained with a small increase in overall dimension.

In addition, this stacking method can also be used as a sealing technique. The narrow space between the layers can be closed with a plastic bead around the periphery as at 16. By using the stack as an encapsulati...