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Shift Register Crossover Capacitor

IP.com Disclosure Number: IPCOM000091645D
Original Publication Date: 1968-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Lee, DH: AUTHOR [+2]

Abstract

This circuit ensures against marginal performance of a shift register employing transistors by controlling the turn off of the first transistor of the register. A positive data pulse via C1 and D1 causes T1 to turn on and the cross-coupling network turns T2 off. When T2 is off, D4 is back-biased to allow T3 to be turned on by the next positive clock pulse via C2 and D2, causing T4 to turn off. This clock pulse also resets T2 on via C3 and D3. T1 is turned off via the cross-coupling network. It is this gating or the second trigger T3, T4 via D4 by the first trigger T1, T2 which causes the data to be shifted to the second trigger. If the gates react slowly, correct operation is assured with a single clock pulse and the data is shifted from the first trigger to the second trigger prior to the resetting of the first trigger.

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Shift Register Crossover Capacitor

This circuit ensures against marginal performance of a shift register employing transistors by controlling the turn off of the first transistor of the register. A positive data pulse via C1 and D1 causes T1 to turn on and the cross-coupling network turns T2 off. When T2 is off, D4 is back-biased to allow T3 to be turned on by the next positive clock pulse via C2 and D2, causing T4 to turn off. This clock pulse also resets T2 on via C3 and D3. T1 is turned off via the cross-coupling network. It is this gating or the second trigger T3, T4 via D4 by the first trigger T1, T2 which causes the data to be shifted to the second trigger. If the gates react slowly, correct operation is assured with a single clock pulse and the data is shifted from the first trigger to the second trigger prior to the resetting of the first trigger. If the gates react too quickly, T1 turns off before the completion of the clock pulse thus causing T4 to turn on resulting in an error. To prevent this error, capacitor C4 is provided which shunts the base drive of T4 from capacitor C5, through T2 as such turns on.

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