Browse Prior Art Database

Light Emitting Transistor

IP.com Disclosure Number: IPCOM000091654D
Original Publication Date: 1968-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 22K

Publishing Venue

IBM

Related People

Shah, BR: AUTHOR

Abstract

This four-layer transistor gives good light efficiency by employing silicon-doped amphoteric GaAs in its construction and N1 and P2 regions which are relatively thin compared to the minority carrier diffusion lengths DL. The use of silicon-doped amphoteric GaAs provides relatively long minority carrier lifetimes. This material therefore permits making the N1 and P2 regions of the transistor thin relative to the carrier diffusion length DL. Thus on application of a voltage Vin, current I1 begins to flow and electrons move across the barrier towards the N1 region. Since the N1 region and P2 region are relatively thin, the injected electrons flow through the N1 and P2 regions causing electrons to be swept up by electric fields set up by the potential between Vo and Vin.

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Light Emitting Transistor

This four-layer transistor gives good light efficiency by employing silicon- doped amphoteric GaAs in its construction and N1 and P2 regions which are relatively thin compared to the minority carrier diffusion lengths DL. The use of silicon-doped amphoteric GaAs provides relatively long minority carrier lifetimes. This material therefore permits making the N1 and P2 regions of the transistor thin relative to the carrier diffusion length DL. Thus on application of a voltage Vin, current I1 begins to flow and electrons move across the barrier towards the N1 region. Since the N1 region and P2 region are relatively thin, the injected electrons flow through the N1 and P2 regions causing electrons to be swept up by electric fields set up by the potential between Vo and Vin. This causes the PN1 junction to be forward biased so that light emission occurs. This light output is proportional to I2.

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