Browse Prior Art Database

Calculating Machine

IP.com Disclosure Number: IPCOM000091668D
Original Publication Date: 1968-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Brooks, EC: AUTHOR [+2]

Abstract

The calculating machine keys in the number of cyclic arithmetic operations desired to perform either a plurality of additions of the same operand or a plurality of subtractions of the same operand. Initially, an operand is loaded into operand register 10 and a previous total or 0 is entered into total register 12. Then, an operator presses one factor key 18 and then presses either add key 14 or subtract key 16. Each represents a different arithmetic factor 1...9.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 92% of the total text.

Page 1 of 2

Calculating Machine

The calculating machine keys in the number of cyclic arithmetic operations desired to perform either a plurality of additions of the same operand or a plurality of subtractions of the same operand. Initially, an operand is loaded into operand register 10 and a previous total or 0 is entered into total register 12. Then, an operator presses one factor key 18 and then presses either add key 14 or subtract key 16. Each represents a different arithmetic factor 1...9.

The factor key which is depressed causes its arithmetic value to be gated to decode logic 20. The latter forms a four-bit binary equivalent of the factor subtracted from 16. For example, if the 7 factor key is depressed, then logic 20 loads the binary equivalent of 9 into counter 22, i.e., 1001.

After the add or subtract key and the factor key are depressed, the arithmetic circuits begin to add or subtract the operand to the contents of register 12. During each arithmetic cycle of adding or subtracting the operand to the quantity in the total, counter 22 is advanced by one count. This cyclic operation of the arithmetic circuits and advancing of counter 22 continues until such counter overloads and reaches 0. In other words, counter 22 is counted up once during each arithmetic cycle and eventually reaches 0. Where 1001 is loaded into counter 22, it reaches 0 after being advanced seven times. Upon counter 22 reaching 0, the contents of register 12 are gated by And 24 to a display and th...