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Arithmetic Circuits

IP.com Disclosure Number: IPCOM000091746D
Original Publication Date: 1968-May-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

McDonald, WL: AUTHOR

Abstract

The circuits facilitate multiplication by over-and-over addition or division by over-and-over subtraction in apparatus, such as an accounting machine. The latter processes binary-coded decimal BCD operands, words, formed of 1-2-4-8 digits and operating on a serial-by-digit, serial-by-bit basis. A shift operation uses two parallel registers in a special manner. There are insertion and recognition of a nonvalid code to end a multiply or divide operation. There is an alternative use of a radix-11 counter with a 12-cycle point clock to end the multiply or divide operation.

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Arithmetic Circuits

The circuits facilitate multiplication by over-and-over addition or division by over-and-over subtraction in apparatus, such as an accounting machine. The latter processes binary-coded decimal BCD operands, words, formed of 1-2-4-8 digits and operating on a serial-by-digit, serial-by-bit basis. A shift operation uses two parallel registers in a special manner. There are insertion and recognition of a nonvalid code to end a multiply or divide operation. There is an alternative use of a radix-11 counter with a 12-cycle point clock to end the multiply or divide operation.

During access of an operand during add or subtract modes, bits flow from memory to storage trigger 1 via line 2 directly to adder 3, and line 4 to memory. Shifting left of partial products and multipliers during a multiply operation, as an example, requires a one-digit delay of each digit. The data flow is then from memory, storage trigger 1, line 5 to multiply control 6, line 7 to counter 8, and line 9 to adder 3. At the time a particular 1, 2, 4, or 8 bit of one digit is read to trigger 1, the corresponding bit of the previous digit is transferred from counter 8 to adder 3. Hardware is decreased when counter 8 is used for additional purposes such as clocking during printout operations.

One method of determining the end of the operation, such as multiply, is to insert a nonvalid code in the multiplier by code generator 10. The code can be an unused 1-2-4-8 bit configuration gre...