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Interconnection Isolation Using Electrophoresis

IP.com Disclosure Number: IPCOM000091854D
Original Publication Date: 1968-Jun-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Barbour, DR: AUTHOR [+3]

Abstract

The process maintains electrical isolation of inner conductive layers from interconnecting holes between the outer layers of a multilayer circuit board.

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Interconnection Isolation Using Electrophoresis

The process maintains electrical isolation of inner conductive layers from interconnecting holes between the outer layers of a multilayer circuit board.

The method includes:
1. Etching the various signal patterns on the designated planes,
2. Assembling the planes and laminating by known techniques,
3. Drilling the required holes in the planes,
4. Contacting those planes which require isolation and

selectively electroetching expose metal along the drilled

holes,
5. Electrophoretically selectively depositing a polymer coating

over designated etched planes to provide a selective

insulation and then curing the coating,
6. Metallizing the card surface, and
7. Reforming the final processing associated with multilayer

card fabrication.

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