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Fabrication Method of Field Effect Transistors

IP.com Disclosure Number: IPCOM000091855D
Original Publication Date: 1968-Jun-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Esaki, L: AUTHOR [+3]

Abstract

This technique forms electric field-responsive transistor structures, e. g., IGFET's, TFT's, etc., by successive vacuum evaporations.

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Fabrication Method of Field Effect Transistors

This technique forms electric field-responsive transistor structures, e. g., IGFET's, TFT's, etc., by successive vacuum evaporations.

In A, substrate 1 is positioned within a vacuum chamber, not shown, along with appropriate evaporate sources A, B, C, and D not shown. The latter are movable along path 3 at a controllable rate. Pattern-defining mask 5, having narrow elongated slit 7 and movable shutter 9, is positioned over the surface of substrate 1.

To form the TFT as in B, source A of metallic material is moved at a constant rate over a distance a-a along line 3 to deposit source and drain electrodes 11 and 13. Shutter 9 is positioned, as shown, to intercept the evaporated material during movement of source A between a'-a' along line 3 to define source-drain gap 15. Subsequently, source B of semiconductive material is moved at a constant rate between b-b along line 3 to deposit active semiconductive layer 17 having a uniform thickness and extending over source and drain electrodes 11 and 13.

When layer 17 is deposited, source C of insulating material is moved between c-c along line 3 at a controlled varying rate to deposit insulating layer 19 having a nonuniform thickness. Source C is moved at a slower rate between c'-c' along line 3 such that the central portion of layer 19 over source-drain gap 15 is of reduced thickness. The TFT structure is completed by moving source D between d-d along line 3 to deposit gate e...