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Voltage Variable Delay Line

IP.com Disclosure Number: IPCOM000091874D
Original Publication Date: 1968-Jun-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Hilton, HT: AUTHOR

Abstract

Variable delay line 1 has a plurality of unit cells 2, one of which is shown in the bottom drawing. The positive transition input signal enters terminals 3 with T1 and T2 off and T3 and T4 on. Thus, T1 is turned on to subsequently turn on T2 by supplying the base current to it. T2 then grounds the base of, and thus turns off, T3 to shut off the current supply to the base of T4. The T4 base charge is thus conducted away through the resistor R5. The time required for charge removal is determined by the size of R5 and the voltage CV2. By varying CV2, the delay time is varied. On a subsequent, negative transition, T1 is turned off to permit turnoff of T2 by conduction of its base charge through R4 to the supply CV1. By varying the voltage of CV1, the delay time on negative transitions can be regulated.

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Voltage Variable Delay Line

Variable delay line 1 has a plurality of unit cells 2, one of which is shown in the bottom drawing. The positive transition input signal enters terminals 3 with T1 and T2 off and T3 and T4 on.

Thus, T1 is turned on to subsequently turn on T2 by supplying the base current to it. T2 then grounds the base of, and thus turns off, T3 to shut off the current supply to the base of T4. The T4 base charge is thus conducted away through the resistor R5. The time required for charge removal is determined by the size of R5 and the voltage CV2. By varying CV2, the delay time is varied. On a subsequent, negative transition, T1 is turned off to permit turnoff of T2 by conduction of its base charge through R4 to the supply CV1. By varying the voltage of CV1, the delay time on negative transitions can be regulated. A plurality of such cells provides delay times of several times the pulse repetition rate and thus provides storage capacity.

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