Browse Prior Art Database

Semiconductor Structure

IP.com Disclosure Number: IPCOM000091908D
Original Publication Date: 1968-Jul-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 21K

Publishing Venue

IBM

Related People

Lloyd, RH: AUTHOR

Abstract

The transistor structure, shown generally as 10, has base region 12 which is pushed out into buried collector region 14. Base 12 is pushed out only in that area beneath emitter region 16. The formation of emitter 16 controls the push-out of base 12. That is, the latter is pushed out as region 16 is diffused. Contacts 18, 20, 22, and 24 are formed on transistor 10. Forming transistor 10 in this manner minimizes the area of high capacitance between base 12 and collector 14. The high capacitance area is restricted to that portion directly beneath emitter 16. High-current density in this region is then possible and high-speed operation follows.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Semiconductor Structure

The transistor structure, shown generally as 10, has base region 12 which is pushed out into buried collector region 14. Base 12 is pushed out only in that area beneath emitter region 16. The formation of emitter 16 controls the push- out of base 12. That is, the latter is pushed out as region 16 is diffused. Contacts 18, 20, 22, and 24 are formed on transistor 10. Forming transistor 10 in this manner minimizes the area of high capacitance between base 12 and collector 14. The high capacitance area is restricted to that portion directly beneath emitter 16. High-current density in this region is then possible and high- speed operation follows.

1

Page 2 of 2

2

[This page contains 1 picture or other non-text object]