Browse Prior Art Database

Etching Process

IP.com Disclosure Number: IPCOM000091913D
Original Publication Date: 1968-Jul-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Franco, JR: AUTHOR [+3]

Abstract

This process produces very fine line patterns in copper films on semiconductor devices.

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This is the abbreviated version, containing approximately 100% of the total text.

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Etching Process

This process produces very fine line patterns in copper films on semiconductor devices.

The etching of fine line patterns in copper films on devices requires an order of magnitude of improvement in minimum line width and spacing over conventional copper etching techniques. Presently, .1 mil lines with .1 mil spacings are being considered. The conventional techniques for etching copper circuit boards with spray FeCl(3), etc., are totally ineffective, with much undercutting of the pattern and complete obliteration of fine contact fingers.

This method consists of (1) depositing a copper layer over a chromium film,
(2) depositing, exposing, and developing a photoresist mask, (3) vacuum baking the resist mask, (4) oxidizing the exposed copper of the copper layer to copper oxide with an oxidizing solution consisting of 200 gm KI, 100 gm I, and 400 mi H(2)O, (5) removing the resultant copper oxide film with an etching solution such as NEUTRACLEAN 68*, thereby exposing a fresh surface of the copper film, (6) alternately repeating steps (4) and (5) until the copper layer is removed, and (7) etching the underlying chromium layer with an etching solution consisting of 25 gm K(3)Fe (CN)6, 50 gm NaOH, and 425 ml H(2)O. *Trademark of the Shipley Company.

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