Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Controlling the Potential at a Semiconductor Surface

IP.com Disclosure Number: IPCOM000091925D
Original Publication Date: 1968-Jul-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 85K

Publishing Venue

IBM

Related People

Gregor, LV: AUTHOR

Abstract

This method controls the surface potential of selected areas of semiconductor devices by choosing the appropriate surface passivation layer.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 65% of the total text.

Page 1 of 2

Controlling the Potential at a Semiconductor Surface

This method controls the surface potential of selected areas of semiconductor devices by choosing the appropriate surface passivation layer.

Steps 1A and 1B show the steps of base diffusion and emitter diffusion in the manufacture of a bipolar transistor of the NPN type.

Thermally produced silicon dioxide, a passivation material, covers the entire surface of the semiconductor. This SiO(2), however, produces an N-type surface so that the potential energy for electrons is lowered in the surface region. This causes the surface of the P-type base to invert, resulting in an N-type channel between the emitter and collector. Base inversion is avoided by steps 1C and 1D.

In step 1C, the silicon dioxide is removed from the surface of the base region. In step 1D Al(2)O(3) is deposited to cover the surface of the base region. Al(2)O(3) produces a P-type surface preventing the P-type base region from becoming inverted to N-type, at the surface, and forming a channel between the emitter and the collector. Mixing SiO(2) with Al(2)O(3) improves the quality of the passivation material and permits surfaces of not only N-type or P-type but any range in between.

By selecting the proper passivation material for each region of the device surface, improved semiconductor devices are produced. Steps 2A...2C show the application of the method to the fabrication of an enhancement mode P-channel field effect transistor FET. The integrate...