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Ring Counter Addressed Monolithic Memory Matrix

IP.com Disclosure Number: IPCOM000091991D
Original Publication Date: 1968-Jul-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Schunemann, C: AUTHOR

Abstract

Memory elements of matrix MM are coincidentally addressed by two ring counters RCX and RCr and driver stages DS. Synchronous counter SC shows the address of addressed element. RCX, RCY, and MM are arranged on the same chips. Thus a very limited number of pins is required for addressing information leads. Overflow of RCX can be applied to counter RCY, thus saving two more pins. If a considerable reduction in the number of pins used is not required, an arrangement combining logical addressing trees and ring counters can be used. As this addressing method operates at a low speed, it is suitable for low-speed memory elements such as SCR's. Overlapping of writing and reading operations is possible. In comparison with addressing trees, addressing through ring counters ensures low attenuation of addressing signals.

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Ring Counter Addressed Monolithic Memory Matrix

Memory elements of matrix MM are coincidentally addressed by two ring counters RCX and RCr and driver stages DS. Synchronous counter SC shows the address of addressed element. RCX, RCY, and MM are arranged on the same chips. Thus a very limited number of pins is required for addressing information leads. Overflow of RCX can be applied to counter RCY, thus saving two more pins. If a considerable reduction in the number of pins used is not required, an arrangement combining logical addressing trees and ring counters can be used. As this addressing method operates at a low speed, it is suitable for low-speed memory elements such as SCR's. Overlapping of writing and reading operations is possible. In comparison with addressing trees, addressing through ring counters ensures low attenuation of addressing signals.

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