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Shift Register

IP.com Disclosure Number: IPCOM000092016D
Original Publication Date: 1968-Aug-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Radcliffe, JK: AUTHOR

Abstract

This shift register circuit, which requires no energy storage elements such as capacitors or indicators, is for high-density integrated circuits. The diode-coupled shift register circuit has fast operation because of quick charge removal during turnoff and high overdrive during turnon.

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Shift Register

This shift register circuit, which requires no energy storage elements such as capacitors or indicators, is for high-density integrated circuits. The diode-coupled shift register circuit has fast operation because of quick charge removal during turnoff and high overdrive during turnon.

A single stage of the shift register, as at A, consists of two diode-coupled latches. The circuit parameters of the transistors are for example, VCE Sat =
0.3V, VBE Sat = 0.7V and the forward drop of the diodes is 0.7V. The register is driven by a two-phase clock as shown at B with a zero voltage between the positive-going pulse for each phase.

As shown at C, T1 and T3 are saturated and T3 and T4 are off when both phase 1 and phase 2 are at zero volts. The data in the latch consisting of T1 and T2 is used to change the state of the latch consisting of T3 and T4. Since there is insufficient voltage across the diode to cause conduction between clock pulses, the register remains latched up. At t1, phase 2 begins to go positive. The typical voltages are as shown, with T1 and T3 saturated and T2 and T4 cut off. As the voltage of phase 2 continues to increase from 0 volts to +0.3 volts at t2, the base voltage of T3 is raised to 1.0 volt where it is clamped by diode D2. As phase 2 continues positive, T3 is turned off due to its clamped base. The collector of T3 goes positive to 1.0 volt where it is clamped by the base of T4 and turns T4 on. The switching action is now compl...