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Interactive Computer Monitor

IP.com Disclosure Number: IPCOM000092035D
Original Publication Date: 1968-Aug-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Anderson, HA: AUTHOR

Abstract

The arrangement enables the monitoring and measuring of the performance of a multitasking, multiprocessing or multiprogramming, computer system by interfacing it to a process control computer PCC. It effects the measuring and recording of the significant events occurring in both the programming and hardware subsystems of a multitasking computer MTC system. The multitasking computer and PCC are interfaced by two separate digital components, viz. a channel-to-channel adapter and a monitor which can comprise a set of high-speed digital registers, control and logic circuits, external interrupt signals, and an appropriate timing circuit.

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Interactive Computer Monitor

The arrangement enables the monitoring and measuring of the performance of a multitasking, multiprocessing or multiprogramming, computer system by interfacing it to a process control computer PCC. It effects the measuring and recording of the significant events occurring in both the programming and hardware subsystems of a multitasking computer MTC system. The multitasking computer and PCC are interfaced by two separate digital components, viz. a channel-to-channel adapter and a monitor which can comprise a set of high- speed digital registers, control and logic circuits, external interrupt signals, and an appropriate timing circuit.

The hardware monitor is connected to a selector type data channel of PCC which is adapted for servicing digital input/output equipment. The hardware monitor is interfaced to selected control signals within the central processors and memory control units, and to the interface of each data channel of the MTC system. The status of the latter's control signals are sampled and recorded in the digital registers of the hardware monitor. In PCC, the contents of the registers of the hardware monitor are sampled either at a constant rate or in response to the receipt and recognition by PCC of an external interrupt signal from the hardware monitor. Certain of the monitored control signals of MTC can be employed by the monitor to produce signals which are operative to interrupt PCC. The latter is programmed to unique...