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Sample and Hold Gain Selectable Amplifier

IP.com Disclosure Number: IPCOM000092039D
Original Publication Date: 1968-Aug-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Granata, PJ: AUTHOR [+2]

Abstract

This sample and hold amplifier system includes input amplifier 10. The input signal is coupled at terminal 12 to the inverting terminal of the amplifier. Amplifier 10 comprises a feedback to the emitters configuration comprising a plurality of resistors R1A, R2A, etc., and a corresponding switch S1A, S2A, etc., for switching the corresponding resistor into the internal feedback path of amplifier 10. Switch 14 is closed to sample the input signal and opened to hold the signal by integrator 16. A feedback path is provided from output terminal 18 to the noninverting terminal 20 of amplifier 10 to provide an overall potentiometric configuration. Such provides high-input impedance to the entire amplifier. Feedback resistors R1B, R2B, etc., are selected by corresponding switches S1B, S2B, etc.

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Sample and Hold Gain Selectable Amplifier

This sample and hold amplifier system includes input amplifier 10. The input signal is coupled at terminal 12 to the inverting terminal of the amplifier. Amplifier 10 comprises a feedback to the emitters configuration comprising a plurality of resistors R1A, R2A, etc., and a corresponding switch S1A, S2A, etc., for switching the corresponding resistor into the internal feedback path of amplifier
10. Switch 14 is closed to sample the input signal and opened to hold the signal by integrator 16. A feedback path is provided from output terminal 18 to the noninverting terminal 20 of amplifier 10 to provide an overall potentiometric configuration. Such provides high-input impedance to the entire amplifier. Feedback resistors R1B, R2B, etc., are selected by corresponding switches S1B, S2B, etc. The gain of the entire combination is controlled by the feedback attenuator, but the loop gain internal to amplifier 10 is kept constant by the feedback to the emitters switching arrangement. By switching the corresponding switches S1A, S1B, etc., together, the settling time and loop gain is then independent of the range of the input voltage.

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