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High Speed Field Effect Structure

IP.com Disclosure Number: IPCOM000092073D
Original Publication Date: 1968-Aug-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Drangeid, KE: AUTHOR

Abstract

This describes to high-speed field-effect transistor structures and to a method for producing them. A perspective view of a transistor structure 1 is shown in drawing A. Transistor 1 consists of layer 20 of semiconductive material, silicon, for example, which is doped to make it highly conductive. Region 21 of semiconductor material extends from layer 20 with alternating layers of insulating material 22 and metal 23 disposed on either side of region 21. Metallic portion 24 overlaps an end of region 21 and is coextensive with one side of the upper layer of material 22.

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High Speed Field Effect Structure

This describes to high-speed field-effect transistor structures and to a method for producing them. A perspective view of a transistor structure 1 is shown in drawing A. Transistor 1 consists of layer 20 of semiconductive material, silicon, for example, which is doped to make it highly conductive. Region 21 of semiconductor material extends from layer 20 with alternating layers of insulating material 22 and metal 23 disposed on either side of region 21. Metallic portion 24 overlaps an end of region 21 and is coextensive with one side of the upper layer of material 22.

Conductive semiconductor layer 20 acts as a conductor attached to the lower end of region 21. Metallic portion 24 acts as a conductor to the upper end of region 21. Conductors 20 and 24 can be characterized as source and drain connections. Metal layers 23, of tungsten or molybdenum, for example, act as conductors to apply a voltage to region 21 and are insulated from conductors 20 and 24 by interleaved layers 22 of insulating material silicon dioxide, for example. Layer 23 can be characterized as a gate electrode. The metal of layer 23 is chosen to cause the build-up of a Schottky barrier within the contact region of semiconductor region 21. Thus, by applying different voltages to layer 23, region 21 displays different values of resistance. This is because practically all the charge carriers within region 21 close to the gate electrode can be removed by applying proper voltages to the gate elect...