Browse Prior Art Database

Sense Circuit for Piezoelectric Crystals

IP.com Disclosure Number: IPCOM000092104D
Original Publication Date: 1968-Sep-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Spurrier, CE: AUTHOR

Abstract

The outputs of high source impedance piezoelectric crystals 10 are coupled directly into low impedance transistor circuitry. Crystals 10 are stressed by mechanical devices, not shown, such as by extended arms of data card punches. Crystals 10 are polarized to develop voltages which reverse bias the collectors of transistors 11. The charges generated by crystals 10 are stored in 100 pf capacitors 12. Since crystals 10 are basically current generators, capacitors 12 perform an impedance transformation by converting a high-voltage short-duration pulse into a lower voltage, longer duration pulse. Capacitors 12 also provide isolation so that several crystals can be connected to one output and enable one side of crystals 10 to be commoned to ground potential.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Sense Circuit for Piezoelectric Crystals

The outputs of high source impedance piezoelectric crystals 10 are coupled directly into low impedance transistor circuitry. Crystals 10 are stressed by mechanical devices, not shown, such as by extended arms of data card punches. Crystals 10 are polarized to develop voltages which reverse bias the collectors of transistors 11. The charges generated by crystals 10 are stored in 100 pf capacitors 12. Since crystals 10 are basically current generators, capacitors 12 perform an impedance transformation by converting a high-voltage short-duration pulse into a lower voltage, longer duration pulse. Capacitors 12 also provide isolation so that several crystals can be connected to one output and enable one side of crystals 10 to be commoned to ground potential. In this arrangement, transistors 11 are grouped by characters, each character having n bits. The emitters of transistors 11 are commonly connected to ground potential. The characters are sampled sequentially. The character sampling signal is applied via resistors 13 to the bases of transistors 11 corresponding to the bits of the character to turn these transistors on. If the associated crystals 10 are stressed so that capacitors 12 charged, then output signals are developed across load resistors RL.

1

Page 2 of 2

2

[This page contains 3 pictures or other non-text objects]