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Block Check Character Comparison on Receiver

IP.com Disclosure Number: IPCOM000092142D
Original Publication Date: 1968-Sep-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Prouteau, X: AUTHOR

Abstract

The accumulated Block Check Character is serially compared on the level of the receiver line with the corresponding bits of the Block Check Character received. The receiver line forms a first input to an input Exclusive-Or, the output of which enters a shift register. The output of the shift register is connected to the first input of an intermediate Exclusive-Or, the output of which is linked with the input of a Block Check Character shift register BCC. The output of the last stage of BCC is fed back to the second input of the intermediate Exclusive-Or. The output of the first stage of BCC is fed back to the input of the shift register through the input Exclusive-Or or an additional Or between the output of the input Exclusive-Or and the input of the shift register.

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Block Check Character Comparison on Receiver

The accumulated Block Check Character is serially compared on the level of the receiver line with the corresponding bits of the Block Check Character received. The receiver line forms a first input to an input Exclusive-Or, the output of which enters a shift register. The output of the shift register is connected to the first input of an intermediate Exclusive-Or, the output of which is linked with the input of a Block Check Character shift register BCC. The output of the last stage of BCC is fed back to the second input of the intermediate Exclusive-Or. The output of the first stage of BCC is fed back to the input of the shift register through the input Exclusive-Or or an additional Or between the output of the input Exclusive-Or and the input of the shift register.

In the latter case, the output of an intermediate BCC stage, corresponding to the position of the last bit of a character, is linked with the second input of the input Exclusive-Or. A further intermediate Exclusive-Or is used between the second and third stages and before the last stage of a two-data character length BCC register. The second input of the additional intermediate Exclusive Or's is connected to the output of an And, the first input of which is branched to the output of the first Exclusive-Or, while the second input is controlled by strobe pulses at BCC time.

As they are transmitted on the receiver line, all bits of a check character are compa...