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Gating Circuit

IP.com Disclosure Number: IPCOM000092152D
Original Publication Date: 1968-Oct-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Picciano, JK: AUTHOR

Abstract

This circuit eliminates the pedestal due to the bit drive current in a 2 1/2-D memory. The application of a bit drive pulse to a 2 1/2-D memory sense line 10 causes pedestal voltage 12. It is difficult for sense amplifier 14 to sense the small signal 12 on this pedestal. For this reason, some time after the bit drive time and before sense time the time constants of this circuit including capacitors C1 and C2 are changed from a low value to a high value. Thus the pedestal is discharged rapidly due to the low value of the time constant. Such occurs at the time that the bit drive pulse reaches the input while the sense signal is passed on to amplifier 14 because of the long time constant during sense times. The change in the time constants is accomplished by turning transistor Q1 on and off.

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Gating Circuit

This circuit eliminates the pedestal due to the bit drive current in a 2 1/2-D memory. The application of a bit drive pulse to a 2 1/2-D memory sense line 10 causes pedestal voltage 12. It is difficult for sense amplifier 14 to sense the small signal 12 on this pedestal. For this reason, some time after the bit drive time and before sense time the time constants of this circuit including capacitors C1 and C2 are changed from a low value to a high value. Thus the pedestal is discharged rapidly due to the low value of the time constant. Such occurs at the time that the bit drive pulse reaches the input while the sense signal is passed on to amplifier 14 because of the long time constant during sense times. The change in the time constants is accomplished by turning transistor Q1 on and off. With Q1 off, current flows from +V to -V through resistors R1 and R2 and the diode bridge. In this situation, all diodes are forward-biased presenting a low impedance between capacitors C1 and C2 as well as to ground. To provide the low time constant for shunting pedestal signals to ground. Some time after the application of the bit drive pulse Q1 is turned off providing the high impedance necessary for a large time constant that allows the signal to reach amplifier 14. After reading is completed, Q1 is turned on for the next read cycle.

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