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High Availability ROS Configuration

IP.com Disclosure Number: IPCOM000092229D
Original Publication Date: 1968-Oct-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 34K

Publishing Venue

IBM

Related People

Bouricius, WG: AUTHOR [+4]

Abstract

In an ultra-available computer employing a Read-Only Store ROS, it is necessary to have more than one ROS present in the machine in order to guarantee correct operation when a failure occurs. The drawing shows the basic structure of a high-availability ROS configuration. Each of the N modules is composed of an ROS, its Address Register ROAR, and its Data Register RDR. Address Block RAB is used to select those ROS's for which the current address is legitimate, i.e., the address does not produce an erroneous output by accessing a failed portion of the ROS's addressing circuitry. Output Reconfiguration Network ORN is used to selectively gate the correct bits from the N RDR's onto the output bus.

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High Availability ROS Configuration

In an ultra-available computer employing a Read-Only Store ROS, it is necessary to have more than one ROS present in the machine in order to guarantee correct operation when a failure occurs. The drawing shows the basic structure of a high-availability ROS configuration. Each of the N modules is composed of an ROS, its Address Register ROAR, and its Data Register RDR. Address Block RAB is used to select those ROS's for which the current address is legitimate, i.e., the address does not produce an erroneous output by accessing a failed portion of the ROS's addressing circuitry. Output Reconfiguration Network ORN is used to selectively gate the correct bits from the N RDR's onto the output bus.

RAB performs two basic functions. First, it stores, in registers, the location of each block of addresses which has previously been determined, by diagnostic tests, to produce erroneous outputs due to the existence of failures in the accessing. Second, as each address enters the ROS, the RAB tests it for inclusion in an inaccessible block and then signals ORN of its decision. If the address does fall into such a block, ORN is told to ignore the output of that particular ROS.

The Address Register AR and the Mask Register MR, which are the same size as the ROAR, are used in the RAB to define each block of locations which is not to be addressed. MR contains 1's in the address bit positions for which a comparison is to be made and 0's elsewhere. In those positions where MR is 0, AR can contain any value. For example, in a 6-bit address ROS let AR = 0 1 0 1 1 0 and MR = 1 1 0 1 0 1. This register pair defines the blocked locations to be those addresses which are specified by 0 1 X 1 X 0, i.e., 0 1 0 1 0 0, 0 1 0 1 1 0, 0 1 1 1 0 0, and 0 1 1 1 1 0 or address locations 20, 22, 28, and 30 respectively. The number of such register pairs in a typical RAB depends on the span of the address space and the desired reliability. As each becomes larger more pairs would become necessary.

When blocks are defined using this...