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Multilayer Color Deflection Correction System

IP.com Disclosure Number: IPCOM000092248D
Original Publication Date: 1968-Oct-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

McDougall, RE: AUTHOR

Abstract

In magnetically deflected cathode ray tubes, the deflection varies according to the formula sin Theta = kni/Square Root Va. Since color selection in multilayer cathode ray tube is provided by varying the anode voltage Va, correction circuitry is required to maintain uniform deflection irrespective of color. The correction system is described in terms of two colors, green and red. The higher discrete voltage level is used to generate a green display and the lower a red display. The anode supply voltage Va of the CRT is applied through terminal 11 and resistor 13 to the CRT anode 15, the cathode 17 of which is connected to ground potential. Va is also applied across a voltage divider comprising resistors 18 and 19 to develop a current I which varies as a function of Va.

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Multilayer Color Deflection Correction System

In magnetically deflected cathode ray tubes, the deflection varies according to the formula sin Theta = kni/Square Root Va. Since color selection in multilayer cathode ray tube is provided by varying the anode voltage Va, correction circuitry is required to maintain uniform deflection irrespective of color. The correction system is described in terms of two colors, green and red. The higher discrete voltage level is used to generate a green display and the lower a red display. The anode supply voltage Va of the CRT is applied through terminal 11 and resistor 13 to the CRT anode 15, the cathode 17 of which is connected to ground potential. Va is also applied across a voltage divider comprising resistors 18 and 19 to develop a current I which varies as a function of Va.

This current is applied through resistor 21 to the base 23 of transistor 25. Constant current, developed by transistor 27 and its associated constant potential source 29, is applied to the emitter of transistor 25. Transistor 31 and 33, connected to collector 30 of transistor 25 together with the constant voltage source 35 and resistor 37, comprise with transistors 25 and 27 the circuitry for modifying I as a square root function. The modified I is applied to the input of FET 39, the output of which is connected through a circuit including resistor 43, correction amplifier 45, and yoke driver 47, to horizontal yoke winding 41.

FET 39 functions as a bilat...