Browse Prior Art Database

FET Memory Cell Using Diodes as Load Devices

IP.com Disclosure Number: IPCOM000092257D
Original Publication Date: 1968-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Dennard, RH: AUTHOR [+2]

Abstract

This monolithic structure can be utilized to fabricate memory cells with field-effect transistors using reverse biased diodes as load devices such as in the circuit of A. The advantages of such a memory cell are low power dissipation and better performance because of the type of nonlinear characteristic of the diode load device.

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FET Memory Cell Using Diodes as Load Devices

This monolithic structure can be utilized to fabricate memory cells with field- effect transistors using reverse biased diodes as load devices such as in the circuit of A. The advantages of such a memory cell are low power dissipation and better performance because of the type of nonlinear characteristic of the diode load device.

The structure is shown in cross-section in drawing B for one inverter circuit of A and is defined by dotted lines BB and B'B'. The inverter consists of backward biased diode 1 and field-effect transistor 2. Driver field-effect transistor 3 applies an appropriate voltage from bit line 2 when transistor 3 is turned on by the application of transistor 2. Driver field-effect transistor 3 applies an appropriate voltage from bit line 2 when transistor 3 is turned on by the application of pulse from the word line. The application of voltages at nodes 4 of the memory cell turns one of transistors 2 ON and the other OFF. The polarities of the voltages applied depend on whether the field-effect transistors are N or P channel devices.

Diode 1 is formed between N-type epitaxial layer 5 and P-type substrate 6 and is isolated from other components by deep P+ isolation diffusion regions 7 which compensate the epitaxial layer and completely surround the diode. The interface between regions 7, a portion of substrate 6, and the isolated N region is identified in B above as the diode PN junction. The source and...