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Diagnostic Techniques Using Variable Window Monitor Circuit

IP.com Disclosure Number: IPCOM000092261D
Original Publication Date: 1968-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 42K

Publishing Venue

IBM

Related People

Clapper, GL: AUTHOR

Abstract

This variable window monitor circuit for diagnosing circuit faults in real-time. The circuit monitors selected points in a system and provides indications of trouble as soon as they occur. The monitor output can be used for stopping operation in the event of an error system re-entry or as a warning of trouble. With this arrangement, the monitoring circuits can be checked by introducing error conditions which would reveal proper or improper operation.

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Diagnostic Techniques Using Variable Window Monitor Circuit

This variable window monitor circuit for diagnosing circuit faults in real-time. The circuit monitors selected points in a system and provides indications of trouble as soon as they occur. The monitor output can be used for stopping operation in the event of an error system re-entry or as a warning of trouble. With this arrangement, the monitoring circuits can be checked by introducing error conditions which would reveal proper or improper operation.

The circuits are particularly suited for three types of monitoring such as dynamic duty cycle diagnosis, complementary states diagnosis, and m-out-of-n bits diagnosis. When the circuit is used for monitoring the duty cycle of a clock oscillator, timing ring, etc., the only additional circuitry needed is an RC integrator shown separately. The signal being monitored is applied to the input of the integrator which provides an output E IN. When the circuit is used for complementary states diagnosis, a two resistor divider network shown separately is used. The complementary signals are applied to the ends of the divider network and the center tap provides the input voltage E IN to the variable monitor circuit. When the circuit is used for m-out-of-n bits diagnosis an input circuit including m parallel resistors is utilized. The n bits are applied one to each of the parallel resistors and the common junction provides the input voltage E IN to the variable monitor.

Input E IN from one of the input circuits, depending upon the application, is applied to the bases of a balanced amplifier comprising two NPN transistors X1 and X2 of the variable monitor unit. Transistor X3 provides a constant-current source to the emitters of X1 and X2. Upper and lower limit voltages are EU and EL are applied to clamping diodes D3 and D4 in such a way that the base of X2 is limited to a voltage b...