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Adaptive Memory Unit with Expansion Capability

IP.com Disclosure Number: IPCOM000092430D
Original Publication Date: 1966-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Clapper, GL: AUTHOR

Abstract

The arrangement is an adaptive memory unit made up of a plurality of subunits, such as storage elements having two or more stable states. Each unit comprises a plurality of the elements such as T1...T4, in this instance of the binary trigger variety, with the outputs from them connected via And's such as 5 and 7 associated with T1. And's 5 and 7, when an input signal is supplied to the terminal In, provide outputs via resistors R to either the E1 or EN1 output lines. Similar output circuits are provided for each remaining trigger T2...T4. Thus the signals on lines E1 and EN1 which exist when an input is present represent the sum of the outputs of units T1...T4.

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Adaptive Memory Unit with Expansion Capability

The arrangement is an adaptive memory unit made up of a plurality of subunits, such as storage elements having two or more stable states. Each unit comprises a plurality of the elements such as T1...T4, in this instance of the binary trigger variety, with the outputs from them connected via And's such as 5 and 7 associated with T1. And's 5 and 7, when an input signal is supplied to the terminal In, provide outputs via resistors R to either the E1 or EN1 output lines. Similar output circuits are provided for each remaining trigger T2...T4. Thus the signals on lines E1 and EN1 which exist when an input is present represent the sum of the outputs of units T1...T4. The setting of the subunits is provided by a plurality of And's such as 9 and 11 associated with T1, which are controlled by conditioning lines C1 and CN1, and by the outputs of the adjacent stages where present.

The system operates in the nature of a reversible counter to set various ones of the subunits in their different combinations, which then provide weighted outputs on E1 and EN1 at the time that a signal is supplied to terminal In. Although the system can be used with subunits having various numbers of stable states, ternary state units appear to be most acceptable. This is because they provide a reasonable number of total weighted states, with less critical tolerances and more economical circuit construction.

Adaptive memory unit banks are then made u...