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Beam Operated Memory Cells

IP.com Disclosure Number: IPCOM000092509D
Original Publication Date: 1966-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Anacker, W: AUTHOR [+3]

Abstract

Semiconductor memory cells which are operable in response to laser light beams or other radiant energy beams are useful in a variety of ways. The following are typical circuit arrangements.

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Beam Operated Memory Cells

Semiconductor memory cells which are operable in response to laser light beams or other radiant energy beams are useful in a variety of ways. The following are typical circuit arrangements.

Drawing A shows a flip-flop circuit comprising light-sensitive field effect transistors T1 and T2. The latter are adapted to be set in 1 or 0 states in response to light or other radiant energy beams selectively furnished by sources S1 and S2, respectively. In this arrangement an optical readout is provided by AC coupling a light-emitting diode between the drain electrodes of T1 and T2. This diode flashes whenever the flip-flop switches from its 1 state, T1 conducting, to its 0 state, T2 conducting. Drawing B shows a flip-flop identical with the one shown in drawing A except that it utilizes a unidirectional sense line instead of a light-emitting element to detect the readout of a 1.

Drawing C shows a nondestructive readout memory cell. A readout gate is provided for enabling the setting of the flip-flop to be nondestructively interrogated. This gate comprises a light-sensitive field effect transistor T3 controlled by an interrogating light source S3.

Drawing D shows an associative memory cell made up of beam-operated flip- flops respectively controlled by electrically operable readout gates. Two cells, each comprising a flip-flop and an associated NDRO gate, are utilized for storing a single digit. A pair of bit lines is employed for interrogating e...