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Semiconductor Etching Technique

IP.com Disclosure Number: IPCOM000092511D
Original Publication Date: 1966-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Agusta, BA: AUTHOR [+2]

Abstract

This etching technique is useful for forming moats or grooves on the surface of a semiconductor substrate.

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Semiconductor Etching Technique

This etching technique is useful for forming moats or grooves on the surface of a semiconductor substrate.

In drawings A and B, the series of moats 1 are formed on the surface of semiconductor substrate 2 leaving a gridded network 3 of protrusions on the surface of substrate 2. The manner in which moats 1 are formed is by a conventional thermal oxidation growth process. In the latter, a semiconductor oxide is formed on the surface of substrate 2 on the region where moat formation is desired. This is achieved by thermally growing oxide on the exposed surface of substrate 2 while masking the surface portions above protrusions 3 by an insulator or by a refractory metal. After the oxide layer is formed on the surface of substrate 2 where moats 1 are desired, the oxide portions are stripped away by conventional oxide etching solutions, such as buffered HF, to provide the etched moat semiconductor surface.

This process is particularly applicable to silicon substrates where silicon dioxide is formed by thermal oxidation techniques. Furthermore, utilization of this technique permits etching control to a high degree of accuracy which is uniform over the entire semiconductor surface.

In addition, in forming dielectrically isolated semiconductor regions in a single monolithic wafer, it is advantageous to use this etching technique to form grooves on the surface of the semiconductor substrate. These grooves can be accurately formed to a design...