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Composite Video Signal Generator

IP.com Disclosure Number: IPCOM000092634D
Original Publication Date: 1966-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Williams, JH: AUTHOR [+2]

Abstract

In a display terminal having a CRT display, the video signals for the individual displays or selected portions of them can vary in duration. Such results in varying intensities on the display. Such display systems frequently employ a marker symbol or cursor which is characterized by a line of greater intensity than the video display. In a logical system for providing these objectives, input signals representing positive video pulses are applied to differentiator 11. The latter responds to the positive transition to provide a pulse via line 13 to the base of transistor 15, causing it to conduct. Latch 17, comprising cross-coupled transistors 15 and 19, has two stable states designated set and reset. When latch 17 is set, transistor 15 conducts and transistor 19 is cut off.

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Composite Video Signal Generator

In a display terminal having a CRT display, the video signals for the individual displays or selected portions of them can vary in duration. Such results in varying intensities on the display.

Such display systems frequently employ a marker symbol or cursor which is characterized by a line of greater intensity than the video display. In a logical system for providing these objectives, input signals representing positive video pulses are applied to differentiator 11. The latter responds to the positive transition to provide a pulse via line 13 to the base of transistor 15, causing it to conduct. Latch 17, comprising cross-coupled transistors 15 and 19, has two stable states designated set and reset. When latch 17 is set, transistor 15 conducts and transistor 19 is cut off. The collectors of transistors 15 and 19 are connected to a source of -6 volts as is capacitor 23. The latter is effectively shorted across the collector-base of transistor 19 during the reset interval. When the latch is set, capacitor 23 charges exponentially toward the +12 volt source through resistor 21. The resulting ramp signal is power amplified through emitter-follower 25 and applied as one of the inputs to voltage comparator 27.

A reference voltage determined by the desired duration of the video signals is applied through line 29 to the other input of voltage comparator 27. Upon comparison the resulting output signal on line 31 is applied to the base of tr...