Browse Prior Art Database

Error Correction Upon Digital Transmission from a Digital Recording Device

IP.com Disclosure Number: IPCOM000092683D
Original Publication Date: 1967-Feb-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Woo, PW: AUTHOR

Abstract

The encoder, drawings A and B, generates the necessary parity bits using a shift register which maintains a cyclic position count with five gated binary triggers forming the encoder logic. These triggers are set by a 1 data bit and are reset by the next 1 data bit, in order to function as modulo-2 summers for respective bit positions in transmitted data.

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Error Correction Upon Digital Transmission from a Digital Recording Device

The encoder, drawings A and B, generates the necessary parity bits using a shift register which maintains a cyclic position count with five gated binary triggers forming the encoder logic. These triggers are set by a 1 data bit and are reset by the next 1 data bit, in order to function as modulo-2 summers for respective bit positions in transmitted data.

After all the data bits in a block are read into the encoder, the value stored in the triggers is the required parity bits SRC for that data block. Then the trigger contents are serially gated out at the end of the data block being read to form the overall encoded data block being transferred. Thus the first SRC bit is a modulo-2 summation of the first data block bit and every fifth bit thereafter.

The second SRC bit is a modulo-2 summation of the second data block bit and each fifth bit thereafter, etc.

The receiving system, drawing C, obtains actual error correction due to permanent signal dropout. If, during the first read pass of the data block at the transmitting station, a threshold circuit at the receiver senses one or more dropped out bits, it sets up a transmit command to prepare for error correction on the next pass. The same signal that enters the threshold circuit is also sent through the detection circuit. The resulting post detection signal is transmitted through the error correction logic which is similar to the encoder logic. If no dropout is sensed by the threshold circuit, the block transmission is assumed to be free from errors and the information whic...