Browse Prior Art Database

Method of Fabricating Integrated Semiconductor Components

IP.com Disclosure Number: IPCOM000092776D
Original Publication Date: 1967-Jan-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 21K

Publishing Venue

IBM

Related People

von Muench, W: AUTHOR

Abstract

In this solid-to-solid diffusing process, doped oxide layers of different thicknesses are employed as diffusion sources to effect concurrently diffused regions of different depths.

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Method of Fabricating Integrated Semiconductor Components

In this solid-to-solid diffusing process, doped oxide layers of different thicknesses are employed as diffusion sources to effect concurrently diffused regions of different depths.

To form an integrated circuit arrangement, N-type semiconductor layer 1 is deposited epitaxially over P-type semiconductor substrate 3. Surface portions of layer 1 at which partition diffusions 5 and base diffusion 9 are to be effected are coated with P-doped oxide patterns 7 and 11 respectively. Patterns 7 and 11 can be formed pyrolytically and defined by photolithographic techniques.

During a heating process, P-type dopant diffuses out of patterns 7 and 11 and into layer 1 to define diffusions 5 and 9 respectively. The heating process is continued for a time sufficient to extend diffusions 5 through layer 1. As the strength of the diffusion sources is dependent on the respective thicknesses of patterns 7 and 11, diffusion 9 extends to a lesser depth in layer 1 than diffusions
5. Also, differential doping of patterns 7 and 11 of equal thicknesses can be utilized to effect concurrently diffusions 5 and 9.

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