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High Capacitance Power Distribution Network

IP.com Disclosure Number: IPCOM000092831D
Original Publication Date: 1967-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Farber, AS: AUTHOR

Abstract

The low-inductance, high-capacitance power distribution network of A comprises voltage distribution plane 1 and ground plane 3, e. g., of aluminum, each having insulating surface coatings 5, e. g., of thermally grown aluminum oxide. Planes 1 and 3 are assembled in parallel fashion by electrically conductive cement 7, e. g., of loaded epoxy material. Additional metallic layers can be appended in similar fashion to define other distribution planes.

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High Capacitance Power Distribution Network

The low-inductance, high-capacitance power distribution network of A comprises voltage distribution plane 1 and ground plane 3, e. g., of aluminum, each having insulating surface coatings 5, e. g., of thermally grown aluminum oxide. Planes 1 and 3 are assembled in parallel fashion by electrically conductive cement 7, e. g., of loaded epoxy material. Additional metallic layers can be appended in similar fashion to define other distribution planes.

The equivalent circuit of the distribution plane of A is shown in B where C1 and C2 are the series capacitances defined between planes 1 and 3 and conductive cement 7, respectively, and R is the resistance of cement 7. C1 and C2 are quite large since coatings 5 are very thin. The resistance of cement 7 is low. The problem of pin holes, if present, in coatings 5 is substantially avoided. This is because such pin holes are probably not aligned and the spreading resistance of cement 7 minimizes coupling between planes 1 and 3.

Connections to planes 1 and 3 are made by standard techniques, clearance holes being etched in plane 1 to effect connections to plane 3. For example, as shown in C, clearance holes 9 and 11 are punched in the laminate of A. Coating 5 is removed and metallic plate 13 is electrically bonded to the exposed surface of plane 3. Wires 15 and 17 are cleared through holes 9 and 11 and soldered to plate 13.

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