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Browse Prior Art Database

Package Technique

IP.com Disclosure Number: IPCOM000093062D
Original Publication Date: 1967-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Cherniack, GB: AUTHOR [+3]

Abstract

This packaging arrangement for semiconductor chips utilizes a copper-threaded stud having a large head. In the latter is nested a semiconductor chip in the balls up position. A spider arrangement of etched copper fingers is positioned over the ball contacts and solder reflowed in place. The holder with its attached contact finger is screwed into a common heat sink plate upon which is mounted a multilayer circuit card. When the contact fingers are aligned with their respective circuit land terminals, a second solder reflow bond is initiated joining the chip to the multilayer circuit card. This completes the assembly. If a given chip device is defective, localized heat is applied to remove the leads, the holder is unscrewed and removed, and a new one inserted.

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Package Technique

This packaging arrangement for semiconductor chips utilizes a copper- threaded stud having a large head. In the latter is nested a semiconductor chip in the balls up position. A spider arrangement of etched copper fingers is positioned over the ball contacts and solder reflowed in place. The holder with its attached contact finger is screwed into a common heat sink plate upon which is mounted a multilayer circuit card. When the contact fingers are aligned with their respective circuit land terminals, a second solder reflow bond is initiated joining the chip to the multilayer circuit card. This completes the assembly. If a given chip device is defective, localized heat is applied to remove the leads, the holder is unscrewed and removed, and a new one inserted.

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