Browse Prior Art Database

Service Aid Transmitter

IP.com Disclosure Number: IPCOM000093074D
Original Publication Date: 1967-May-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Hollaway, JT: AUTHOR [+2]

Abstract

This service aid transmitter simulates the transmission of data locally into the local communication receiver in either a single-cycle or high-speed mode. The code transmitted through the terminal is created by the selective operation of switches.

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Service Aid Transmitter

This service aid transmitter simulates the transmission of data locally into the local communication receiver in either a single-cycle or high-speed mode. The code transmitted through the terminal is created by the selective operation of switches.

The receiver clock is utilized as the basic timing source for the test system. The clock receiver initiates a number of repetitive cycles upon the receipt of a signal on the receiving line. The top drawing shows electronic logic utilized to generate the initial line transition. The latter starts the clock and subsequently generates the code which is utilized to test the terminal.

The initial line transition is generated when transmit switch 11 is opened. At this time, all inputs to And 13 are true since the clock is initially down. The Not A and Not B lines indicate that a bit has not recently been received. Thus, And 13 is satisfied and Or 15 passes a transition to the line. The clock is then initiated. After one cycle, opened. At this time, all inputs to And 13 are true since the clock is initially down. The Not A and Not B lines indicate that a bit has not recently been received. Thus, And 13 is satisfied and Or 15 passes a transition to the line. The clock is then initiated. After one cycle, the clock is again down and once again And 13 is satisfied. Therefore, the depression of switch 11 is effective to periodically simulate a received bit and therefore keeps the clock in operation. Depression of switch 11 also brings the other incidentally required circuits of the receiving terminal to a status proper for the reception of dat...