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Self Timing Card Reading Circuitry

IP.com Disclosure Number: IPCOM000093093D
Original Publication Date: 1967-May-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Leary, TG: AUTHOR

Abstract

This card reader sensing circuitry enables the maximum of read time gating. A group of input terminals 1 1-0...1 1-12, is individually connected to card reader sensing probes, e.g., brushes. A strobe pulse is applied to a further input terminal 11-S. Terminals 11 are individually connected to one input of And's 14, the outputs of which are individually connected to a group of output terminals 20-0...20-12. And's 14 have their other inputs connected by common line 16 through switch 22-G to Or 24. The inputs of Or 24 are connected to the card reader terminals 11 and through another switch 22-S to terminal 11-S.

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Self Timing Card Reading Circuitry

This card reader sensing circuitry enables the maximum of read time gating. A group of input terminals 1 1-0...1 1-12, is individually connected to card reader sensing probes, e.g., brushes. A strobe pulse is applied to a further input terminal 11-S. Terminals 11 are individually connected to one input of And's 14, the outputs of which are individually connected to a group of output terminals 20- 0...20-12. And's 14 have their other inputs connected by common line 16 through switch 22-G to Or 24. The inputs of Or 24 are connected to the card reader terminals 11 and through another switch 22-S to terminal 11-S.

Alternately, terminal 11-S is connected to Or 26 by switch 22-S. The Or 24 output is applied by ganged switch 22-G to Or 26. The latter is useful in circuits where other gating and latching circuitry of conventional form are interposed in the overall circuitry for performing conventional functions. A safety circuit is an example.

This circuitry brings up the And circuits of the card column being sensed at the leading edge of either the strobe pulse or the card read sense pulse. The circuit drops the And circuits at the trailing edge of the other pulse, thus affording maximum time for performing the reading of a card.

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