Browse Prior Art Database

Direct Access Tape Control System

IP.com Disclosure Number: IPCOM000093154D
Original Publication Date: 1967-Jun-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 3 page(s) / 84K

Publishing Venue

IBM

Related People

Bradley, EF: AUTHOR

Abstract

This system reaches an address directly while searching rapidly in a reverse direction as well as in the forward direction. This is in conjunction with a tape transport reproducing data in low-speed operation in the forward direction only. The information to be reproduced is recorded on magnetic tape in one or more tracks adjacent to a track having only digitally recorded block address sectors. The information, for example, is in the form of audio frequency message sectors for an educational instructional system. Digital data sectors are within the scope of the operation.

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Direct Access Tape Control System

This system reaches an address directly while searching rapidly in a reverse direction as well as in the forward direction. This is in conjunction with a tape transport reproducing data in low-speed operation in the forward direction only. The information to be reproduced is recorded on magnetic tape in one or more tracks adjacent to a track having only digitally recorded block address sectors. The information, for example, is in the form of audio frequency message sectors for an educational instructional system. Digital data sectors are within the scope of the operation.

A start pulse from a controlling programmed central processing unit CPU appearing at input terminal 11 sets Run flip-flop 12 connected to the tape transport, not shown, at a terminal 13. Search flip-flop 14, Reverse flip-flop 15 and Reproduce flip-flop 16 are triggered by pulses applied to corresponding input terminals 17 and 18 and register reset pulse terminal 19. By And's 21...23, appropriate solenoids in the tape transport are energized in accordance with the energization of output terminals 24...27.

Address register 30 comprises a multiple of, for example, fourteen concatenated flip-flops 32...45 coupled to count decoder circuitry 50. Delta register 30 is loaded and sensed in parallel by circuitry, not shown, for entering an address or for checking an operation. Address data obtained bit-by-bit from the address sectors and applied at input terminal 51 is delayed and regenerated in single-shot 52 for serial entry by Or's 53 and 54 and And's 55...57 and Invert 58 into register 30. Such action is under the control of clock pulses obtained from the address data and applied at input terminal 59.

Register decrementing circuitry comprises And's 61 and 62, Or 63, Invertor's 64 and 65, Carry Store flip-flop 70, Count Control flip-flop 72, and And 73. Flip- flop 72 is raised at register reset time for operating register 30 in a counting mode. Flip-flop 72 is reset over line 50-0 when decoder 50 determines a count of zero in register 30.

In searching in the forward direction, register 30 is loaded with the number of sectors through which the magnetic tape is to be moved. In this operation, register 30 is used as a delta address device.

When the value in delta register 30 is sixteen or greater, the high-speed forward drive is energized. Address sectors are detected as the tape moves. The register is decremented by one each t...