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Semiconductor Resistance Measuring Technique

IP.com Disclosure Number: IPCOM000093196D
Original Publication Date: 1967-Jun-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Benjamin, CE: AUTHOR

Abstract

This technique is for measuring the resistance, for example, of a base region of semiconductor transistor devices formed on a semiconductor wafer by measuring a base region of a dummy device formed on the wafer for resistance test purposes. A dumbbell shaped channel is formed by the combination of base and emitter diffusion operations. The resistivity of the base channel beneath the emitter diffused region is measured by the probes at opposite surface portions of the dumbbell diffused region. By applying a burnin pulsing current between the two adjacent probes located at each end of the dumbbell shaped region, good electrical contact to the semiconductor material, preferably of silicon is achieved.

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Semiconductor Resistance Measuring Technique

This technique is for measuring the resistance, for example, of a base region of semiconductor transistor devices formed on a semiconductor wafer by measuring a base region of a dummy device formed on the wafer for resistance test purposes. A dumbbell shaped channel is formed by the combination of base and emitter diffusion operations. The resistivity of the base channel beneath the emitter diffused region is measured by the probes at opposite surface portions of the dumbbell diffused region. By applying a burnin pulsing current between the two adjacent probes located at each end of the dumbbell shaped region, good electrical contact to the semiconductor material, preferably of silicon is achieved. Now, with the use of a low-current resistance measuring circuit, not shown, between one probe A located at one end of the dumbbell shaped region and another probe B located at the other end of the dumbbell shaped region, the resistance of the base region of the dummy device can be accurately measured. Thus an accurate indication of the resistance of the base region of the semiconductor devices on the wafer is realized.

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