Browse Prior Art Database

Service Priority Polling Arrangement

IP.com Disclosure Number: IPCOM000093215D
Original Publication Date: 1967-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 3 page(s) / 47K

Publishing Venue

IBM

Related People

Mackie, D: AUTHOR [+6]

Abstract

The circuit provides service scanning for a data transmission system. The circuit utilizes unused storage cycles for scanning machine control words, MCW's, in a prespecified sequence for service requests such as data, end and sense service. The prespecified sequence is wired into this circuit. The MCW's are classified into three priority groups. Each group is located in successive addresses in a local random access storage device. The address of one MCW in each group is contained in one of three registers SA, SB, and SC. One of these addresses at any given time is transferred to service address register AR which is, in turn, transferred to a backup address register BR if the latter is available.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Service Priority Polling Arrangement

The circuit provides service scanning for a data transmission system. The circuit utilizes unused storage cycles for scanning machine control words, MCW's, in a prespecified sequence for service requests such as data, end and sense service. The prespecified sequence is wired into this circuit. The MCW's are classified into three priority groups. Each group is located in successive addresses in a local random access storage device. The address of one MCW in each group is contained in one of three registers SA, SB, and SC. One of these addresses at any given time is transferred to service address register AR which is, in turn, transferred to a backup address register BR if the latter is available.

In order to control SA, SB, and SC, three control signals A, B, and C respectively are required. These control signals also provide a priority for a prespecified number of storage cycles for each of the groups defined by the addresses in SA, SB, and SC. A, B, and C signals are generated in a priority control circuit which responds town. advance counter signal. The latter is derived each time a storage cycle is provided for the service scanning function. According to the prespecified sequence, a first predetermined number of storage cycles is required during which the A control signal is provided by the priority control circuit. As soon as this number of storage cycles is completed, the B control signal is provided for a second prespecified number of storage cycles. When this is completed, a third prespecified number of memory cycles is provided during which the C control signal is provided.

Register SA operates on the addresses in group A. These can, for example, be between addresses N and N + K. Assuming that the register starts off at address N, the latter N is available at the output of AR. This address is applied to a limit circuit which receives the A signal from the priority control signal. The limi...