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Diode Isolation Bussing

IP.com Disclosure Number: IPCOM000093247D
Original Publication Date: 1967-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Austin, PC: AUTHOR [+2]

Abstract

The arrangement is for interconnecting units, such as processors and stores, in a data processing system. It is possible to drive one main line from n drivers without introducing any mismatch. The system is perfectly matched if R1 equals Z1, R2 equals Z2 and 2R1 equals R2. Hence 2Z1 equals Z2.

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Diode Isolation Bussing

The arrangement is for interconnecting units, such as processors and stores, in a data processing system. It is possible to drive one main line from n drivers without introducing any mismatch. The system is perfectly matched if R1 equals Z1, R2 equals Z2 and 2R1 equals R2. Hence 2Z1 equals Z2.

Under normal quiescent conditions T1...Tn are on and saturated such that the collector-emitter voltage. Vce is less than the forward voltage Vfd across the transistor. If a data pulse is to be sent along to either receiver A or B from any of the transistors, then that particular transistor is turned off. Suppose T1 is required to send data to receiver B. T1 is turned off and a pulse of amplitude (V - Vce) /2 begins to propagate from the T1 collector towards diode D1.

If (V - Vce)/2 >/= Vfd the diode is forward biased and lets the pulse go through. At point 3 the pulse sees Z2 in each direction which is equivalent to it seeing Z2/2 equals Z1 and there is therefore no mismatch at this point. While travelling from point 3 towards the receiver B, the pulse sees none of the Z1 lines, since diodes D2...Dn are reverse biased and arrives at B distortionless. The amplitude of the voltage at point 2 is (V + V(fd)/2 - V(ce) and at point 3 is (V - V(fd))/2.

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