Browse Prior Art Database

Monotype Handling of Integrated Circuit Chips

IP.com Disclosure Number: IPCOM000093248D
Original Publication Date: 1967-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Howard, WE: AUTHOR [+2]

Abstract

This technique is for handling integrated circuit chips and for mounting a plurality of such chips concurrently onto a insulating substrate having a predetermined interconnection pattern.

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Monotype Handling of Integrated Circuit Chips

This technique is for handling integrated circuit chips and for mounting a plurality of such chips concurrently onto a insulating substrate having a predetermined interconnection pattern.

In A, wafter 1, having an array of tested integrated circuits 3 formed in it, is mounted onto a segmented substrate 5 comprising a plurality of monotype-like prismatic carriers 7. Wafer 1 is diced, each circuit chip 9 being supported on a carrier 7 as shown in B, when substrate 5 is disassembled so that handling is facilitated.

Carriers 7 supporting the same or different chip types can be reassembled to provide a desired circuit system when transferred onto insulating substrate 11 as shown in C. Metallic interconnection pattern 13 having lands 13' for operatively interconnecting chips 9 is formed on the surface of substrate 11. When lands 15 on chips 9 are contacted to corresponding lands 13', permanent connection between them is effected by bonding techniques. Carriers 7 can be urged individually toward substrate 13, for example, by pneumatic devices, to insure contact between lands 13' and 15. Carriers 7 can either be removed or utilized for heat sink purposes.

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