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Transistor Collector Clamp

IP.com Disclosure Number: IPCOM000093251D
Original Publication Date: 1967-Jul-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Collins, TW: AUTHOR

Abstract

In high-speed transistor circuits, it is often necessary to limit the voltage at the collector to keep the transistor out of saturation. The circuit diagram, lower drawing, is illustrative of the semiconductor structure in the upper drawing. Transistor 1 has emitter region 2, base region 3, and collector region 4. Resistor element 5 has plated connection 6 which allows it to be connected to a power supply. Plated connection 7 bridges the junction between collector 4 and element 5. As an alternative to a single connection at point 7, two separate plated connections can be interconnected by a wire. In such an arrangement, the junction between resistor 5 and collector 4 is bridged by a wire instead of the plated connection. The junction between resistor 5 and collector 4 operates as a distributed diode.

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Transistor Collector Clamp

In high-speed transistor circuits, it is often necessary to limit the voltage at the collector to keep the transistor out of saturation. The circuit diagram, lower drawing, is illustrative of the semiconductor structure in the upper drawing. Transistor 1 has emitter region 2, base region 3, and collector region 4. Resistor element 5 has plated connection 6 which allows it to be connected to a power supply. Plated connection 7 bridges the junction between collector 4 and element 5. As an alternative to a single connection at point 7, two separate plated connections can be interconnected by a wire. In such an arrangement, the junction between resistor 5 and collector 4 is bridged by a wire instead of the plated connection. The junction between resistor 5 and collector 4 operates as a distributed diode. Thus, whenever the potential in collector region 4 is more negative than the forward drop across the junction between collector 4 and resistor 5, the diode conducts, thus limiting the voltage to which collector region 4 can fall. In this manner, saturation of transistor 1 is avoided.

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