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Decoding Circuits With a Minimum of N Shift Register Stages

IP.com Disclosure Number: IPCOM000093283D
Original Publication Date: 1967-Aug-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 3 page(s) / 35K

Publishing Venue

IBM

Related People

Tang, DT: AUTHOR

Abstract

A cyclic code decoder usually requires an N-stage buffer register. The latter is connected in parallel with division circuitry regulated by a generator polynomial g(x) of degree r. N is the total length, k the number of information N digits, and r the difference of N-k as the number of parity check digits.

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Decoding Circuits With a Minimum of N Shift Register Stages

A cyclic code decoder usually requires an N-stage buffer register. The latter is connected in parallel with division circuitry regulated by a generator polynomial g(x) of degree r. N is the total length, k the number of information N digits, and r the difference of N-k as the number of parity check digits.

These decoding circuits are without a buffer register. Instead use made of double or a tandem of division circuits comprising the division circuit of g(x) followed in series by the division circuit of h(x) = (x/N/ -1) /g(x). If the received message is without error, the input is divided by g(x)- h (x) = x/N/ - 1. The message is transmitted unchanged because the syndrome recognizing circuit is inactive. The advantage is that the total number of stages in both division circuits is only N stages which is the minimum for a separable code.

A number of alternatives are available. In a dual code application the positions of the two division circuits can be interchanged. Then also threshold devices can be used in the syndrome recognizing circuit and in conjunction with an error-trapping approach. A third arrangement is a nonseparable code application dispensing with the division circuit of h(x).

In the case of separable codes, such a decoding circuit contains two parts connected in series. The division circuit of g(x) is followed by the division circuit of h(x) = (x/N/- 1) / g(x) as in drawing A. It has these features. 1. Since the two division circuits are connected in series, the output of the division circuit of h(x)is the input divided by g(x)- h(x) = x/N/-1. Therefore the exact copy of the received message is reproduced if the syndrome recognizing circuit 19 is inactivated. 2. The division circuit of g(x)functions in exactly the same way as it does in the usual forms of decoding circuits. 3. The same syndrome recognizing circuit, as used previously, can be used to identify the errors and trigger the correction at the output of the division circuit of h(x). 4. No N-stage shift register circuit is connected in parallel. The numbers of shift register stages in the division circuit of g(x) is...