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Digital Phase Locked Loop

IP.com Disclosure Number: IPCOM000093293D
Original Publication Date: 1967-Aug-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Van Blerkom, R: AUTHOR [+3]

Abstract

Digital techniques are used for handling analog signals. The digital phase-locked loop shown accomplishes its purpose through digital techniques. The latter are not pure digital substitutions for the normal analog method of handling the same problem.

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Digital Phase Locked Loop

Digital techniques are used for handling analog signals. The digital phase- locked loop shown accomplishes its purpose through digital techniques. The latter are not pure digital substitutions for the normal analog method of handling the same problem.

A digital phase-locked loop detects the incoming waveform, estimates the phase of the wave, and continues to track on the same phase. A typical application for such a device is in a digital receiver.

In this digital phase-locked loop, the incoming wave is first fed by mode selector 1 into acquisition section 2 of the digital phased-locked Fourier transform digital analyzer 21. An acceptable algorithm for computing the Fourier transform is the Cooley-Tukey algorithm. The real and imaginary components of each spectral component are squared by squarers 22 and 23 respectively. Adder 24, by adding the real and imaginary components of each of the spectral components, determines the power of each spectral component. Greatest-of detector 25 determines which of the spectral components contains the most power.

After the largest spectral component is determined by acquisition section 2, mode selector 1 routes the incoming waveform into tracking section 3. Fourier transform digital analyzer 31 performs a Fourier transform on the incoming wave only in the neighborhood of the largest spectral component. The phase of the incoming wave is computed by taking the arc tangent of the imaginary part or the real...