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Resynchronization Circuit

IP.com Disclosure Number: IPCOM000093481D
Original Publication Date: 1967-Oct-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Books, AK: AUTHOR

Abstract

It is common to provide a sample signal when sensing data. The sample signal is usually generated by counting emitter pulses. The emitter pulses are generated in synchronism with the movement of the data bearing media. The sampling and data signals can get out of synchronization if the data bearing media slips as it is being transported or if the data manifestations are out of registration.

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Resynchronization Circuit

It is common to provide a sample signal when sensing data.

The sample signal is usually generated by counting emitter pulses. The emitter pulses are generated in synchronism with the movement of the data bearing media. The sampling and data signals can get out of synchronization if the data bearing media slips as it is being transported or if the data manifestations are out of registration.

The sample signal is available whenever nip-flop F-F 10 of A is set. The AC set and reset inputs of F-F 10 are under control of And 11. The inputs to And 11 are satisfied when flip-flop F-F 12 is set and flip-flops F-F's 13 and 14 are reset. F-F's 12, 13 and 14 form counter 15. The latter is advanced by emitter pulses from a source, not shown, which are applied to And 16. This is conditioned by an emitter gate signal and the absence of a signal from the reset output of flip-flop F-F 31.

If the data signal occurs early with respect to the sample signal, as in C, Or 20 provides an input to And 23 which is conditioned by the output of Inverter I 22. This causes flip-flop F-F 26 to be set. Thereafter, when the sample signal is available and the data signal is absent, the input conditions to And 24 are satisfied because it is conditioned by Inverter I 21. Thus, flip-flop F-F 27 becomes set. With F-F 26 set, and F-F 27 being set, flip-flop F-F 28 becomes set to condition And 30.

The next emitter pulse satisfies And 30 and it passes a set counter to nine sig...