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Browse Prior Art Database

Universal Program Access to the Instruction Register

IP.com Disclosure Number: IPCOM000093489D
Original Publication Date: 1967-Oct-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Leary, TG: AUTHOR

Abstract

By making the instruction address register directly addressable, the operation of a data processing system is enhanced.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 76% of the total text.

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Universal Program Access to the Instruction Register

By making the instruction address register directly addressable, the operation of a data processing system is enhanced.

The components of a central processing unit are shown as a storage address register 10, storage 12, storage register 14, instruction address register 16 and other components 18. These components are interconnected in conventional manner as shown with the addition of two connections 21 and 22. The latter connect the input of register 16 to the output of register 10 and to the output of register 14. Thus register 16 is directly addressable by register 10 or one of the other components 18.

With the address of register 16 as a unique address within the address field(s) of all of the instructions in a systems instruction set, register 16 can be addressed and the content can be changed by the programmer on any and all instructions. In conventional arrangements, only a relatively few branch instructions are effective to alter the content of register 16.

One advantage of these connections lies in the greater diagnostic capability for servicing and evaluating programs. Register 16 can be used in a diagnostic program to provide as many indicators of good and faulty operation as there is capacity for words in storage 12. A diagnostic routine can be reduced to a single instruction loop with this arrangement. The looping is made possible by targeting the register 16. If an instruction fails to modify that...