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Fabricating MOS Devices with Different Thresholds

IP.com Disclosure Number: IPCOM000093539D
Original Publication Date: 1967-Oct-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Pleshko, P: AUTHOR [+2]

Abstract

The methods are for forming MOS FET devices having different thresholds in a single substrate.

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Fabricating MOS Devices with Different Thresholds

The methods are for forming MOS FET devices having different thresholds in a single substrate.

It is possible to place many devices on a single chip. Since, in the MOS FET environment, it is desirable to have different threshold voltages depending on the function of the devices, it is possible by simply changing the resistivity of a local area of a substrate to change the threshold voltage in different areas with a single applied substrate voltage.

Two methods and two structures are shown. In the first method, there is a substrate of resistivity rho(1), shown at 1A, in which wells or recesses 1 are etched as shown at 1B. Recesses 1 are backfilled epitaxially with a semiconductor of resistivity rho(2) as shown in 1C. FET MOS devices are then formed in the rho(1) regions and in the inlaid rho(2) regions.

In the second method, there is a substrate of resistivity rho(1), shown in 2A, on which a layer of resistivity rho(2) is epitaxially deposited shown in 2B. Portions of resistivity rho(2) are then etched from the epitaxial layer leaving islands of resistivity rho(2) upstanding on a substrate of resistivity rho(1). Again, MOS FET devices can be fabricated on the surface of both the rho(1) and rho(2) resistivity regions.

Application of a given bias to a substrate results in a different threshold for devices fabricated on different resistivity areas. Thus additional desired flexibility in circuit design is realized.

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