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SCR Test Circuit

IP.com Disclosure Number: IPCOM000093540D
Original Publication Date: 1967-Oct-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Radcliffe, WE: AUTHOR

Abstract

This test circuit provides the minimum holding current necessary for an SCR device.

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SCR Test Circuit

This test circuit provides the minimum holding current necessary for an SCR device.

Test device 20 has its anode gate and emitter electrodes suitably connected to input terminals of the test circuit. Relay K5 controls the operation of the test circuit. With K5 in the unpicked state, operational amplifier A1 is adapted to saturate. The voltage at TP1 is about -10 volts, which charges capacitor C1 to approximately 10V, biases transistor Q1 to provide approximately 50 milliamps through resistor R4 and the test device. Relay contacts K5-3 and resistor R16 permit the test device to fire as soon as such contacts are closed. Resistor R5 can now be operated to read the same current through the digital voltmeter DVM as that through the test device.

When relay K5 picks, the plus voltage on the gate of the test device is removed and the negative terminal of the power supply is switched to draw current from the anode-gate junction of the test device by way of resistor R15. The gate is prevented from becoming minus while the test device is fired by R15. Diode CR5 keeps the gate emitter junction at -3V with the test device turned off.

At the time relay K5 picks, the voltage at the collector of transistor Q4 is lowered which reverse biases diodes CR3 and CR4. Resistor R2 is open circuited by the operation of relay contacts K5-1. Current commences to flow from the 12V supply through resistor R1, diode CR2, C1, resistor R4, test device operational amplifier A2, t...