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Lost Interrupt Indication

IP.com Disclosure Number: IPCOM000093579D
Original Publication Date: 1967-Nov-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Anderson, DW: AUTHOR [+2]

Abstract

In high-performance computers where execution of an instruction is commenced prior to the completion of a previous instruction, the instruction counter can proceed well ahead of instruction execution. This leads to the situation in which interrupts associated with execution of instructions cannot be precisely associated with an instruction address. In such situations, instructions subsequent to an instruction which causes an interrupt can exist in the execution buffers and must be executed despite the interrupt. Such outstanding instructions, when executed, can lead to further interrupts which may or may not be dependent on the original interrupt.

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Lost Interrupt Indication

In high-performance computers where execution of an instruction is commenced prior to the completion of a previous instruction, the instruction counter can proceed well ahead of instruction execution. This leads to the situation in which interrupts associated with execution of instructions cannot be precisely associated with an instruction address. In such situations, instructions subsequent to an instruction which causes an interrupt can exist in the execution buffers and must be executed despite the interrupt. Such outstanding instructions, when executed, can lead to further interrupts which may or may not be dependent on the original interrupt.

There is shown a portion of the logic utilized for detecting and indicating on a priority basis, interrupts that occur in a basic computer system. In such a system, ranging from the smallest computer to the largest computer, individual interrupt signals on lines 1...16 are recorded in a set of triggers 21...36. Inverters
41...55 and And's 61...75 form a priority circuit which provides one input to Interrupt Code Generator 80 corresponding to the highest priority interrupt detected. Generator 80 provides a four-bit coded output identifying the interrupt that has been recognized. This code is transmitted to a status word utilized for controlling the routine initiated to handle the interrupt.

In the smaller computers of the basic system that do not have instruction execution overlap, this is suffi...