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Printed Circuit Core Wiring

IP.com Disclosure Number: IPCOM000093603D
Original Publication Date: 1967-Nov-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Gustafson, RM: AUTHOR [+2]

Abstract

The structure holds an array of small ferrite cores 6 and is formed of layers of copper 3, adhesive 4, and dielectric 5.

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Printed Circuit Core Wiring

The structure holds an array of small ferrite cores 6 and is formed of layers of copper 3, adhesive 4, and dielectric 5.

At each core location, the lowermost layer of copper is etched to form an opening equal to the inside diameter of a core. The other layers are etched to form an opening slightly larger than the outside diameter of the core. Plastic material 2 is deposited by electrophoresis at a location to engage the outer circumference of the core to help hold the core in place.

The outer layers of copper form part of a circuit that couples the cores. These layers are beveled to form a support for a printed circuit not shown. The latter can be located inside a core to link the upper and lower conductors. In the completed memory, several core planes are stacked in a position to receive wires that each link a corresponding core in each supporting structure.

In drawing A, there is a center layer of copper that is connected to function as a ground plane. The material 2 is formed on the inside surface of the core receiving apertures of the support.

In drawing B, there are two layers of copper. Material 2 is deposit on the upper layer and extends partially into the core receiving aperture.

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