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Transformer Source for Memory Drive Method

IP.com Disclosure Number: IPCOM000093607D
Original Publication Date: 1967-Nov-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Hoffman, WK: AUTHOR

Abstract

In the circuit, line 2 is one of many drive lines in a ferrite core memory. A selected one of the lines is given half-select current levels for switching ferrite cores 3 for read and write operations.

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Transformer Source for Memory Drive Method

In the circuit, line 2 is one of many drive lines in a ferrite core memory. A selected one of the lines is given half-select current levels for switching ferrite cores 3 for read and write operations.

Line 2 and similar drive lines, not shown, are connected through isolating diodes 4 to read bus 5 at one end and write bus 6 at the other end. Transistor 7 and transformer 8 cooperate to give bus 5 a suitable positive potential for a read operation. Each drive line has an individual transistor 9 that is turned on to complete the circuit for producing a read current on the selected one of the many drive lines. Transistor 12, transformer 13, and transistor 14 similarly cooperate to energize the selected drive line for a write operation.

When a transistor 7 or 12 is turned on, the capacitance associated with the drive wires is charged to a positive voltage level that is established by the source voltages and the turns ratio of the transformers. The latter have a step-up turns ratio to give the line a higher voltage than the source. Transistor 15 is connected to cooperate with transformer 13 to give bus 6 ground potential during a read operation. This operation prevents bus 6 from discharging through transistor 9 during the rise of read current. Thus the operation improves the rise time of the read current in drive line 2. Transistor 16 similarly maintains bus 5 at ground during a write operation.

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