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Load Sharing Switch

IP.com Disclosure Number: IPCOM000093612D
Original Publication Date: 1967-Nov-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 14K

Publishing Venue

IBM

Related People

Abraham, CT: AUTHOR [+2]

Abstract

Load sharing magnetic core switches for controlling the writing and reading of information in selected addresses in a memory are provided. The number of input lines for the switches is less than the number of output lines. The arrangement of the lines and their manner of excitation is such that only the selected core in the switch is positively driven in the direction necessary to produce an output for controlling the memory. The unselected cores either receive a net energization of zero or are actually driven in the negative direction. The wiring matrices for the core switches are derived using the properties of finite geometries and simple triple systems. Four different types of arrangements are in tabular form below. (Image Omitted)

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Load Sharing Switch

Load sharing magnetic core switches for controlling the writing and reading of information in selected addresses in a memory are provided. The number of input lines for the switches is less than the number of output lines. The arrangement of the lines and their manner of excitation is such that only the selected core in the switch is positively driven in the direction necessary to produce an output for controlling the memory. The unselected cores either receive a net energization of zero or are actually driven in the negative direction. The wiring matrices for the core switches are derived using the properties of finite geometries and simple triple systems. Four different types of arrangements are in tabular form below.

(Image Omitted)

Here v = No. of output lines = No. of cores, b = No. of regular input drives, r = No. of regular input windings per core, K = No. of cores on a regular input drive, - d = net excitation on a selected core, e = bias excitation for rewriting, s = power of a prime, and t = a positive integer.

Type I Associate the outputs with the points of a three-dimensional projective geometry over a Galois field with s elements. The input drives are associated with the planes of this geometry, i.e., the input wire connected to a drive passes through all the cores associated with the points lying on the plane corresponding to the drive. However there is no core associated with the point 0001 and there are no drives associated with any plane which contains the point 0001. The bias line winds through all the cores and carries -s units of excitation for set operation and -d units for reset operation. This configuration provides a class of core switches with parameters v = s/3/ + s/2/ + s, b = s/3/, r = s/2/, k = s/2/, k = s/2/+ s+1, d =s/2/ - s, e = -s.

Type II Associate the outputs with the lines of a finite two-dimensional Euclidean geometry over a Galois field with s elements. The input drives are associated with the points of this geometry. An input drive is wound through all cores which correspond to all lines which contain the particular point corresponding to the input drive. The bias line is wound through all the cores and contains a -1 unit of excitation for set operation and a-d unit of excitation for reset operation. This configuration provides class of core switches with parameters. v = s/2/ + s, b = s/2/, r = s, k = s+1, d = s-1, e = -1.

Type 111 A simple triple system is an arrangement of b objects, such that every pair of objects appears exactly in one triplet. Such triplets can be found by...