Browse Prior Art Database

Semiconductor Wafer Alignment Fixture

IP.com Disclosure Number: IPCOM000093634D
Original Publication Date: 1967-Nov-01
Included in the Prior Art Database: 2005-Mar-06
Document File: 2 page(s) / 70K

Publishing Venue

IBM

Related People

Delgado, VJ: AUTHOR

Abstract

This fixture permits the alignment of semiconductor wafers contained in a carrier. Wafer handling time is reduced in connection with formation of active and passive devices in the wafers.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Semiconductor Wafer Alignment Fixture

This fixture permits the alignment of semiconductor wafers contained in a carrier. Wafer handling time is reduced in connection with formation of active and passive devices in the wafers.

Carrier 20 has side grooves 22 and a longitudinal semicircular notch 24 located at its base. A plurality of disk members 23, typically semiconductor wafers, is individually located in grooves 22 of carrier 20. Each disk member includes an indentation or notch 28 for alignment purposes.

Cooperating with carrier 20 is rod 30 of selected diameter less than that of notch 24. Rod 30 is brought into contact with the plurality of disks 23 and rotated by suitable apparatus not shown. The rotating rod 30 imparts a rotating motion to disk 27 until indentations 28 or notches are seated on such rod. The plurality of wafers is in alignment when all indentations 28 are engaged with rod 30.

1

Page 2 of 2

2

[This page contains 4 pictures or other non-text objects]